Senior Analog Layout Design Engineer
- 1 HC
- Above 5 years
- Bachelor
- Room 306-310,Building No.4 Shenzhen SoftwarePark No.1 Nanshan District Shenzhen
Description
1. Be responsible for the layout design of analog/mixed-signal ICs, especially the layout implementation of power devices and power integrated circuits, ensuring that the layout design meets the requirements of circuit performance, reliability, and manufacturing processes.
2. Work closely with circuit design engineers to deeply understand the intent of circuit design, plan layout, optimize the layout to reduce parasitic effects, improve matching, and reduce power consumption.
3. Be responsible for layout verification work, including DRC (Design Rule Check), LVS (Layout Versus Schematic), ERC (Electrical Rule Check), etc., to ensure the correctness and manufacturability of the layout.
4. For the special requirements of power devices, such as high voltage, high current, thermal effects, etc., perform layout-level optimization design to improve device performance and reliability.
5. Participate in the uation and development of new processes and technologies, and research new technologies and methods for layout design applicable to power ICs.
6. Write layout design documents, documenting the design process, key decisions, and experience summaries, to facilitate knowledge sharing and technical accumulation within the team.
7. Lead the top-level design, guide and train junior layout design engineers, and enhance the overall technical proficiency of the team.
Qualifications
1. Proficient in IC layout design tools such as Cadence Virtuoso and Mentor Graphics Calibre, and familiar with IC manufacturing processes and device physics.
2. Possess relevant knowledge of analog/mixed-signal circuits, and understand the impact of circuit matching, parasitic effects, noise, power consumption, etc. on layout design.
3. Familiar with the structure and working principle of power devices, with experience in high-voltage and high-current layout design, and understanding of thermal effects and reliability design of power ICs.
4. Possess strong problem analysis and solving skills, be capable of independently completing the layout design and verification of complex ICs, and have successful tape-out experience.
5. Possess strong teamwork spirit and communication skills, and be able to effectively communicate and collaborate with teams involved in circuit design, process, testing, etc.
6. Possess strong learning capabilities and an innovative mindset, stay updated with the latest industry trends and technological developments, and be capable of continuously learning and applying new technologies.
Those with relevant work experience are preferred:
- Have design experience in power IC fields such as automotive electronics, power management, and motor drive;
- Familiar with manufacturing processes such as BCD, which are applicable to power ICs;
- Have experience in large team projects, with technical leadership or project management experience;
- Please note that this position requires leading a team of at least 3 team members.
Welfare Treatment
1. Competitive salary with full payment of five insurances and one fund;
2. Annual physical examination and supplementary medical insurance;
3. Festival bonuses afternoon tea birthday gifts and birthday parties;
4. Annual travel quarterly team building activities and departmental dinners;
5. Generous vacations like starting from 10 days of annual leave paid sick leave parental leave etc. with two days off on weekends.
Delivery email
If you need to apply for this position, please send your resume to your email:hr@leadpoweric.com